The Evolution of RISC-V 64-bit in Open Source Development

RISC-V (pronounced "risk-five") is a free and open Instruction Set Architecture (ISA) developed with simplicity, scalability, and modularity in mind. Introduced in 2010 by researchers at the University of California, Berkeley, RISC-V was designed to address limitations of proprietary ISAs, fostering innovation in processor design. Its evolution, particularly the 64-bit variant, reflects a growing collaboration between academia, industry, and the open-source community.

1. Early Development and Academic Roots (2010–2014)

The RISC-V project began as an academic initiative under the leadership of Krste Asanović, David Patterson, and their team at UC Berkeley. They aimed to create a clean-slate ISA that avoided the complexities and licensing restrictions of existing architectures like x86 or ARM. The 64-bit variant (RV64) was integral from the outset, as it supported high-performance and energy-efficient applications. Early tools, simulators, and basic compilers for RISC-V were developed within academia, laying the foundation for its use in real-world scenarios.

• The initial RISC-V ISA specification was released in 2011.

• In 2014, the first publicly available RISC-V core implementations were released, including Rocket Chip, a parameterized SoC generator.

2. Open-Source Adoption and Expansion (2014–2018)

The open-source community quickly recognized the potential of RISC-V's openness. Its modular ISA design allowed developers to customize features without licensing fees or legal constraints. During this period, several key projects and organizations emerged:

• RISC-V Foundation: Established in 2015, the foundation (now RISC-V International) formalized the ISA's development and ensured compatibility across implementations.

• GNU Toolchain and LLVM Support: Efforts to integrate RISC-V into mainstream compilers like GCC and LLVM began early, enabling developers to compile software for RV64.

• SiFive: Founded by members of the original RISC-V team, SiFive delivered commercial RISC-V cores while promoting open hardware.

Key open-source projects included:

• Spike Simulator: The official RISC-V ISA simulator, used for early RV64 software development.

• QEMU RISC-V Support: By 2017, QEMU began supporting RV64, enabling virtualization and broader testing capabilities.

3. Hardware Development and Ecosystem Growth (2018–2022)

As open-source tools matured, RISC-V 64-bit implementations began to emerge in hardware, focusing on everything from embedded systems to high-performance computing. The modularity of RISC-V drove a diverse range of applications:

• Open-Source Processor Cores:

  • Rocket Chip: Continued development and deployment in academic and commercial environments.

  • BOOM (Berkeley Out-of-Order Machine): An out-of-order RISC-V processor optimized for performance.

  • CV64A6: Cores targeting Linux-capable systems.

• Linux Kernel Support: In 2018, the Linux kernel officially added support for RV64, signaling a major milestone for RISC-V adoption in general-purpose computing.

• Open-source Hardware Platforms:

  • Projects like HiFive Unleashed and HiFive Unmatched provided developers with RISC-V RV64 hardware for software and firmware development.

4. Modern Advancements and Mainstream Adoption (2022–Present)

RISC-V 64-bit development has seen rapid acceleration due to advancements in software, hardware, and ecosystem tools:

• Expanded Compiler and OS Support:

  • Mainstream operating systems like Fedora, Debian, and FreeBSD now support RV64.

  • Optimizations in GCC and LLVM have enhanced performance for RISC-V software.

• Open-Source Projects:

  • LibreSOC: A hybrid CPU-GPU leveraging the RISC-V 64-bit architecture.

  • Core-V Family: Developed by the OpenHW Group, this open-source RV64 core targets IoT, embedded, and general-purpose applications.

• High-Performance Computing:

  • The European Processor Initiative (EPI) has explored RISC-V for HPC.

  • Open-source projects like Chisel have enabled customized RV64 cores for scientific and industrial applications.

• Commercial Hardware:

  • Companies like Intel and NVIDIA have integrated RISC-V into their products, often leveraging open-source tools for design and development.

5. The Future of RISC-V 64-bit in Open Source

The RISC-V 64-bit architecture continues to evolve, driven by open-source principles and community collaboration. Emerging trends include:

• Custom Extensions: Open-source tools like RISC-V GNU Assembler and RISC-V LLVM Backend allow developers to define custom instructions for specific applications.

• AI and ML Applications: Projects like Tensorflow Lite for RISC-V are integrating RV64 into machine learning pipelines.

• Secure and Trusted Computing: Open-source RISC-V cores are being tailored for secure systems, leveraging extensions like RISC-V P (cryptography) and RISC-V TEE (Trusted Execution Environment).

Conclusion

RISC-V 64-bit has become a cornerstone of open-source hardware innovation, reflecting a broader shift towards democratizing technology. Its journey from academic curiosity to a robust, industry-backed ISA showcases the power of open collaboration. With a thriving ecosystem and active community, RV64 is poised to redefine computing across domains, from embedded devices to supercomputers.